1. Field of the Invention
The present invention relates in general to switched-capacitor techniques and in particular to switched-capacitor circuits with reduced distortion in the transfer function.
2. Description of the Related Art
Delta-sigma modulators are particularly useful in digital to analog and analog to digital converters (DACs and ADCs). Using oversampling, the delta-sigma modulator spreads the quantization noise power across the oversampling frequency band, which is typically much greater than the input signal bandwidth. Additionally; the delta sigma modulator-performs noise shaping by acting as a lowpass filter to the input signal and a highpass filter to the noise; most of the quantization noise power is thereby shifted out of the signal band.
The typical delta sigma modulator includes a summer summing the input signal with negative feedback, a linear filter, quantizer and a feedback loop with a digital to analog converter coupling the quantizer output and the inverting input of the summer. In a first order modulator, the linear filter comprises a single integrator stage while the filter in higher a order modulator comprises a cascade of a corresponding number of integrator stages. The quantizer can be either a one-bit or a multiple-bit quantizer. Higher-order modulators have improved quantization noise transfer characteristics over those of lower order, although stability becomes a more critical design factor as the order increases.
Switched-capacitor filters/integrators are useful in a number of applications, including the integrator stages in delta sigma modulators. Generally, in a basic singled-ended switched-capacitor integrator, the input signal is sampled by switches onto a sampling capacitor during the sampling (charging) phase. A reference voltage may also be sampled onto a reference sampling capacitor during this phase. During the following dump phase, the charge on the sampling capacitor(s) is transferred at the summing node of a operational amplifier to the integrator capacitor in the amplifier feedback loop. The operational amplifier drives the integrator output.
During the dump phase, transients of up to a few volts can occur at the summing nodes. These relatively high voltages can cause the threshold voltage of the MOSFETs at the operational amplifier inputs to temporarily vary from the expected nominal threshold voltages. Consequently, an offset is introduced at the inputs of the operational amplifier which can in turn cause distortion in the circuit transfer function. In high performance applications, this distortion may not be acceptable. Hence, techniques are required for minimizing summing node transients in switched capacitor circuits, especially those switched capacitor circuits used in high performance applications where minimization of distortion is desirable.
The principles of the present invention address the problem of variation in the input threshold voltage of an operational amplifier and in particular, operational amplifiers used in switched capacitor circuits.
According to one embodiment of these principles, a switched-capacitor circuit is disclosed includes a sampling capacitor, switches for charging the sampling capacitor during a charging phase, and switches for transferring charge from the sampling capacitor to a load in a feedback loop of an operational amplifier during a dump phase. Circuitry is provided for controlling discharge of the sampling capacitor during the dump phase to minimize transients at the input of the operational amplifier and thereby minimize input threshold voltage variation.
Thus, according to the inventive principles, the input transients at the operational amplifier inputs are substantially reduced and consequently input threshold voltage variation is also reduced. Ultimately, the reduction in input threshold voltage variation reduces distortion in the amplifier output.